Find Semiconductor engineer Jobs in Leixlip, Ke

ASIC Digital Design, Principal Engineer
Synopsys —Dublin, County Dublin
- Computer Science
- Engineering
- Bachelor's degree
PCIE SOC Application Engineer (Sr Staff)
Synopsys —Dublin, County Dublin
- Master's degree
- No degree
- In-person
11d
Senior Analog Design Manager (m/f/div)
Infineon Technologies AG —Dublin, County Dublin
- English
- Leadership
- Communication skills
Process Engineer
DPS Group —Citywest, County Dublin
- Full-time
- System design
- Communication skills
Electrical Project Manager - Dublin
Designer Group —Ballycoolen, County Dublin
- €70,000–€90,000 a year
- Full-time
- Engineering
- Project management
- No degree
Quick apply
Applications Engineering, Manager
Synopsys —Dublin, County Dublin
- Master's degree
- No degree
- In-person
11d
Electrical Designer
Jacobs —Dublin, County Dublin
- Hybrid work
- AutoCAD
- Electrical Engineering
- Communication skills
ASIC Digital Design, Architect
Synopsys —Dublin, County Dublin
- Leadership
- Communication skills
ASIC Digital Verification Architect
Synopsys —Dublin, County Dublin
- Leadership
- Communication skills
Engineer II, Field Service
ASM —Lucan, County Dublin
- Engineering
- Maintenance
- Master's degree
Principal Silicon Validation Engineer
Qorvo —DUBLIN 8, County Dublin
- Engineering
- Data analysis skills
- Analysis skills
3d
Megasys Safety Specialist
Merck KGaA —Dublin, County Dublin
- Day shift
- Microsoft Office
- Analysis skills
- Bachelor's degree
5d

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PCIE SOC Application Engineer (Sr Staff)
Synopsys —Dublin, County Dublin
Participating in cross-functional teams to relay customer feedback, contribute to product improvements, and stay current with the latest interface protocols and…
11d

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ASIC Digital Design, Principal Engineer

Synopsys -
Dublin, County Dublin

Apply Now

Job details

Qualifications

Computer Science
Engineering
Bachelor's degree
Software development
AI
Python

Full job description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of

high-performan

ce silicon chips and software content.

You Are:

You are an accomplished AI engineer with a deep understanding of GenAI, RAG, and agentic AI systems. You enjoy architecting robust,

production-rea

dy solutions that streamline technical workflows and empower teams.

What You’ll Be Doing:

Agent & Workflow Development

Architect multi-agent systems and agentic workflows for IP R&D automation
Design and implement AI copilots with tool use, planning, and memory capabilities
Build prompt systems and orchestration logic for complex, multi-step tasks

RAG & Knowledge Systems

Design retrieval pipelines for semiconductor IP documentation (specs, verification reports, design docs)
Build ETL

(Extract-Trans

form-Load) workflows for document parsing, chunking, and semantic enrichment

Optimize retrieval quality through evaluation, reranking, and hybrid search strategies

Integration &

Interoperabili

Implement MCP (Model Context Protocol)

servers/client

s for secure context sharing across enterprise tools

Build A2A

(Agent-to-Agen

t) integrations connecting AI services with existing IP development workflows

Develop APIs enabling seamless interaction between agents and EDA (Electronic Design Automation) tools

Production & Reliability

Establish evaluation frameworks: retrieval metrics, agent task success rates, output quality scoring
Implement guardrails for output validation, hallucination detection, and domain accuracy
Build observability i

nfrastructure:

tracing, token usage monitoring, latency tracking

Optimize for

cost/performan

ce through caching, model routing, and token management

Collaboration

Partner with IP designers and verification engineers to capture domain expertise
Translating R&D workflow pain points into AI-powered solutions
Document architecture, prompt strategies, and integration patterns for team scaling

The Impact You Will Have:

Accelerate IP development cycles through intelligent automation
Reduce manual effort via smart copilots and agentic workflows
Enable data-driven decisions through AI-powered insights
Improve accuracy and consistency across verification and documentation tasks

What You’ll Need:

5+ years in software development with AI/ML focus
Expertise in GenAI, RAG, and agentic AI systems
Advanced Python proficiency (modularity, testing,

documentation)

Understanding of semiconductor IP development practices
Experience with ETL pipelines,

observability,

and cloud deployment

BS in Engineering, Computer Science, or related field

Nice to Have:

Experience with agentic frameworks (e.g., LangChain, LlamaIndex, CrewAI, or equivalent)
Familiarity with MCP and A2A integration patterns
Background in EDA tool integration

Who You Are:

Innovative

problem-solvin

g with AI

Strong

cross-function

al collaboration skills

Ability to translate technical concepts for diverse audiences
S

elf-motivated,

adaptable approach to continuous learning

The Team You’ll Be A Part Of:

Join an engineering team pioneering GenAI solutions for Digital Interface Controller IP, working closely with stakeholders to deliver transformative AI applications.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Apply Now

Refine Your Search

semiconductor engineer jobs in leixlip, ke

ASIC Digital Design, Principal Engineer

PCIE SOC Application Engineer (Sr Staff)

Senior Analog Design Manager (m/f/div)

Process Engineer

Electrical Project Manager - Dublin

Applications Engineering, Manager

Electrical Designer

ASIC Digital Design, Architect

ASIC Digital Verification Architect

Engineer II, Field Service

Principal Silicon Validation Engineer

Megasys Safety Specialist

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