Find Bridges engineer Jobs in Dublin, D

ASIC Digital Design, Staff Engineer
Synopsys —Dublin, County Dublin
- Master's degree
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Resident Engineer (Project Opera)
PUNCH Consulting Engineers —Dublin, County Dublin
- €50,000–€65,000 a year
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Forward Deployed Engineering Manager, Generative AI, Google Cloud
Google —Dublin, County Dublin
- €186,000–€191,000 a year
- Full-time
- Spanish
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- Doctoral degree
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Validation Specialist ( 18 Months Agency Contract )
Viatris —Damastown, County Dublin
- Full-time
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Staff Engineer, Firmware Engineering
Analog Devices —Glasnevin, County Dublin
- Full-time
- System design
- Master's degree
- C++
Asset Management Airport Asset Manager
DAA —Dublin, County Dublin
- Full-time
- AutoCAD
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Staff Certification and Compliance Engineer
Analog Devices —Glasnevin, County Dublin
- Full-time
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Head of Digital & AI Design
Waystone —Dublin, County Dublin
- Full-time
- Hybrid work
- Azure
- Salesforce
- Agile
Quick apply
Design Assurance Engineer, Device Technical Operations ( 18 Months FTC )
Viatris —Northern Cross, County Dublin
- Full-time
- Engineering
- No degree
- Communication skills
Senior Forward Deployed Engineer
Intercom —Dublin, County Dublin
- Hybrid work
- JavaScript
- In-person
- Communication skills
- Annual leave
- Work from home
Senior IT Security & Network Engineer / Architect 12-Month Contract | Dublin
Hadfield Green —DUBLIN 2, County Dublin
- Communication skills
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Environmental Scientist
Roughan & O'Donovan —Dublin, County Dublin
- Part-time
- Microsoft Powerpoint
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1d
Principal Engineer, Grid Insights Lead
Analog Devices —Glasnevin, County Dublin
- Full-time
- Computer Science
- Master's degree
- C++
Site Reliability Engineer - Foundation Team
Global-e —Dublin, County Dublin
- Full-time
- DevOps
- AWS
- Budgeting
Quick apply
Hydrogeologist
Egis —Dublin, County Dublin
- Master's degree
- Bachelor's degree
- In-person
Director of Software Engineering - Workplace Technology
JPMorganChase —DUBLIN 2, County Dublin
- Full-time
- Azure
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Engineering Manager - Civil, Structures & Utilities
Dublin Port Company —Dublin, County Dublin
- Full-time
- Engineering
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- Leadership
Quick apply
Lead Program Security Engineer
Mastercard —Dublin, County Dublin
- Full-time
- DevOps
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- Leadership
Senior Flutter Developer
Holafly —Dublin, County Dublin
- Remote
- Master's degree
- AI
- Communication skills
- Relocation assistance
- Annual leave
Head of Responsible AI- Vice President
EXL Service —Dublin, County Dublin
- Full-time
- Hybrid work
- Microsoft Excel
- Doctoral degree
- Computer Science

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ASIC Digital Design, Staff Engineer

Synopsys -
Dublin, County Dublin

Apply Now

Job details

Qualifications

Master's degree
Analysis skills
Bachelor's degree
Computer Engineering
AI
Communication skills
Debugging

Full job description

We Are:

At Synopsys, we drive the innovations that shape how we live and connect. Our technology is central to the Era of Pervasive Intelligence — from self-driving cars to learning machines — and we lead in chip design, verification, and IP integration that power high-performance silicon and software.

Within our HPC Controller IP organization, the mid-end team is the bridge between RTL design and physical implementation. We build the flows, automation, and quality checks that synthesize, verify, package, and release complex soft IP at scale — and we hand physical-design teams inputs that are clean, constrained, and implementation-ready.

You Are:

A motivated mid-end engineer with a solid grasp of ASIC design and verification flows, and genuine enthusiasm for automation, flow robustness, and using AI to raise engineering productivity, debug speed, and quality of results. You partner naturally with RTL designers to understand design intent, turn their outputs into physical-design-ready inputs, and collaborate across verification, DFT, physical design, methodology, and tooling teams. You communicate clearly, take ownership, and let data guide your decisions.

What You’ll Be Doing:

Develop, run, and support mid-end flows spanning synthesis, DFT, static checking (SpyGlass), formal equivalence, power analysis, and related quality gates.
Convert RTL outputs into clean, constrained, implementation-ready inputs for physical design.
Build and maintainTcl-based automation, dashboards, and project infrastructure — and apply AI to accelerate the work (e.g., triaging flow logs, summarizingQoRtrends, drafting and refactoring scripts).
Debug flow failures end to end:analyzereports, isolate root cause, and drive issues to closure with design, verification, DFT, and implementation teams.
Improve documentation, handoff criteria, and reusable collateral so execution stays consistent across IP programs.

The Impact You Will Have:

Higher-quality RTL-to-physical-designhandoffs and lower implementation risk.
Faster, more scalable execution through stronger automation and AI-enabled analysis.
Synthesis, DFT, static, formal, and power issues caught earlier in the cycle.
Tighter collaboration across the RTL-to-implementation chain.
Robust, implementation-ready soft IP shipped with clear constraints, checks, and release collateral.

What You’ll Need(Core):

Working knowledge of ASIC design, verification, and mid-end development flows, typically gained through 5+ years of relevant experience or equivalent project work.
Hands-on synthesis experience, with the ability toanalyzeand resolve synthesis issues.
StrongTclscripting skills and a practical, automation-first mindset.
Familiarity with at least two of: DFT concepts, static checking (SpyGlassor equivalent), formal equivalence (e.g., Formality), or power analysis — and willingness to grow across the rest.
Ability to use AI tools effectively to accelerate debugging, summarize results, and improve scripts and flows.
Strong analytical, problem-solving, communication, and documentation skills.
BS/MS in Electrical/Computer Engineering or equivalent experience.

Nice to have :

Experience across the full mid-end set: DFT,SpyGlass, Formality, and power analysis.
IP development methodologies, IP packaging, or reusable IP delivery / release collateral.
Hands-on with Synopsys tools such as Fusion Compiler and VCSpyGlass.

Who You Are:

Proactive, curious, and adaptable.
Collaborative and ethical.
Flow-oriented, AI-aware, and quality focused.
Resilient and resultsoriented.

The Team You’ll Be A Part Of:

You’ll work with a high-impact High-Performance-Compute team focused on delivering complex IP to the marketplace. You will collaborate across RTL design, verification, DFT, physical design, methodology, and project infrastructure teams to improve mid-end readiness and enable predictable downstream implementation.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about salary and benefits during the hiring process.

Apply Now

Refine Your Search

bridges engineer jobs in dublin, d

ASIC Digital Design, Staff Engineer

Resident Engineer (Project Opera)

Forward Deployed Engineering Manager, Generative AI, Google Cloud

Validation Specialist ( 18 Months Agency Contract )

Staff Engineer, Firmware Engineering

Asset Management Airport Asset Manager

Staff Certification and Compliance Engineer

Head of Digital & AI Design

Design Assurance Engineer, Device Technical Operations ( 18 Months FTC )

Senior Forward Deployed Engineer

Senior IT Security & Network Engineer / Architect 12-Month Contract | Dublin

Environmental Scientist

Principal Engineer, Grid Insights Lead

Site Reliability Engineer - Foundation Team

Hydrogeologist

Director of Software Engineering - Workplace Technology

Engineering Manager - Civil, Structures & Utilities

Lead Program Security Engineer

Senior Flutter Developer

Head of Responsible AI- Vice President

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