Find Engineer (python) Jobs in Dublin 8, D

ASIC Digital Design, Sr Staff Engineer
Synopsys —Dublin, County Dublin
- Master's degree
- Bachelor's degree
- Electrical Engineering
3h
ASIC Digital Design, Principal Engineer
Synopsys —Dublin, County Dublin
- Master's degree
- Bachelor's degree
- Electrical Engineering
6h
Principal Engineer
Intercom —Dublin, County Dublin
- Hybrid work
- Python
- Work from home
Senior Site Reliability Engineer
Fivetran —Dublin, County Dublin
- Full-time
- Azure
- Java
- AWS
- Annual leave
- Sick pay
Quick apply
Staff Product Engineer
Intercom —Dublin, County Dublin
- Hybrid work
- Python
- Work from home
Senior Engineer - Innovation and Planning - Generic
Eirgrid —Dublin, County Dublin
- Engineering
- Analysis skills
- Python
Quick apply
Assoc. Security Engineer, AWS Customer Incident Response Team (CIRT)
Amazon EU SARL, Irish Branch - P81 —Dublin, County Dublin
- Full-time
- Java
- AWS
- C++
6d
Principal Security Engineer, AWS Security
Amazon Data Services Ireland Limited —Dublin, County Dublin
- Full-time
- AWS
- Leadership
- Python
Senior kdb+ Engineer
Data Intellect —Dublin, County Dublin
- Full-time
- Hybrid work
- Azure
- AWS
- Continuous improvement
- Referral programme
Quick apply
Senior Compiler Engineer
Innatera Nanosystems —Dublin, County Dublin
- Full-time
- Remote
- C++
- Communication skills
- Python
Quick apply
12d
Senior Lead Engineer - Innovation and Planning - Generic
Eirgrid —Dublin, County Dublin
- Engineering
- Analysis skills
- Mentoring
Quick apply
Senior Verification Engineer
TechBiz Global GmbH —Dublin, County Dublin
- Full-time
- Remote
- Doctoral degree
- Master's degree
- Bachelor's degree
Quick apply
Senior Infrastructure Security Engineer
Crusoe —Dublin, County Dublin
- Full-time
- AWS
- Linux
- AI
Quick apply
Engineering Lead
Rain Technologies Inc. —Dublin, County Dublin
- Full-time
- Remote
- System design
- SQL
- AWS
Quick apply
Operations Engineer, Fleet Reliability
CoreWeave Europe —Dublin, County Dublin
- Every weekend
- Software troubleshooting
- Bachelor's degree
- No degree
- Employee assistance program
Quick apply

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ASIC Digital Design, Principal Engineer
Synopsys —Dublin, County Dublin
Experience in interface IP verification, formal verification tools like Jasper or VC Formal, and AI-assisted coding tools like Cursor or GitHub Copilot will set…
6h
ASIC Digital Design, Architect
Synopsys —Dublin, County Dublin
Collaborating closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all…

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ASIC Digital Design, Sr Staff Engineer

Synopsys -
Dublin, County Dublin

Apply Now

Job details

3 hours ago

Qualifications

Master's degree
C
Bachelor's degree
Perl
Computer Engineering
GitHub
SystemVerilog
Electrical Engineering
Python
Debugging

Full job description

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver

industry-leadi

ng silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent over a decade building verification environment that catches the bugs that matter, not just hit coverage targets. You can architect a UVM environment from scratch, write the sequences that stress the design.

At Synopsys, you will work on interface IP that powers real silicon, and the verification environment you build will be the reason it works.

What You'll Be Doing

Collaborate with design teams to define verification requirements and translate specs into test plans that cover functional, edge case, and performance scenarios
Architect and implement UVM testbench environments, including agents, scoreboards, and reusable verification components for interface IP designs
Write System Verilog test sequences and constrained random stimulus to stress designs and uncover corner cases before silicon
Implement System Verilog Assertions for

simulation-bas

ed functional verification and formal verification flows

Build and analyze functional and code coverage metrics, identify gaps, and drive coverage closure
Lead and mentor a team of verification engineers, teaching UVM methodology, debugging techniques, and testbench architecture best practices

The Impact You Will Have

Deliver verified interface IP designs that meet tape out schedules and quality targets, directly enabling customer success in

high-performan

ce silicon

Reduce verification cycle time and improve bug detection through

well-architect

ed testbenches and reusable verification IP

Establish verification standards and methodologies that scale across multiple projects and teams
Accelerate team productivity by mentoring engineers on UVM, formal verification, and advanced debugging techniques
Catch critical design issues early in the development cycle, reducing costly respins and improving time to market
Build verification environments that become reference

implementation

s for future projects

What You'll Need

Bachelor's or master’s degree in computer engineering, Electrical Engineering, or Communication Engineering
8+ years of hands-on ASIC design verification experience with strong focus on UVM-based functional verification
Deep expertise in System Verilog, including advanced testbench architecture, constrained random verification, and

coverage-drive

n verification

Proven experience implementing System Verilog Assertions for functional and formal verification flows
Strong programming skills in at least two of: C, System Verilog, TCL, Perl, or Python
Experience with PCI Express and CXL protocols is a strong plus
Experience in interface IP verification, formal verification tools like Jasper or VC Formal, and AI-assisted coding tools like Cursor or GitHub Copilot will set you apart

Who You Are

You can spot a verification gap in a design review that no one else flagged and articulate why it matters in a way that gets it prioritized
You review code with enough precision that engineers know exactly what to fix and enough respect that they want to do better next time
You do not wait for perfect information to start building. You work with what you have, ask the right questions, and move forward
Teaching comes naturally. You can explain UVM factory overrides or coverage bin construction in a way that makes a junior engineer understand it

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Apply Now

Refine Your Search

engineer (python) jobs in dublin 8, d

ASIC Digital Design, Sr Staff Engineer

ASIC Digital Design, Principal Engineer

Principal Engineer

Senior Site Reliability Engineer

Staff Product Engineer

Senior Engineer - Innovation and Planning - Generic

Assoc. Security Engineer, AWS Customer Incident Response Team (CIRT)

Principal Security Engineer, AWS Security

Senior kdb+ Engineer

Senior Compiler Engineer

Senior Lead Engineer - Innovation and Planning - Generic

Senior Verification Engineer

Senior Infrastructure Security Engineer

Engineering Lead

Operations Engineer, Fleet Reliability

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