Job Summary:
ON Semiconductor is seeking a self-driven and motivated professional with a stellar record of innovation to join an IP Center-Of-Excellence in the Analog Mixed Signal Group. As a digital architect in the IP Center of excellence you will have the opportunity to impact on the next generation digital & mixed signal innovations in multiple business units spanning across the whole of the group. You will be working with a world-class team of professionals focusing on developing the power-management (PMU) and clock management (CMU) platform IP sub-systems that will be used by all product lines across multiple business units as well as standalone discrete products.
Performance Objectives:
onsemi’s System Resources IP Center of Excellence is hiring an experienced Digital architect to help us develop IP(s) & sub-systems for next generation Automotive, Industrial & Medical products. The successful candidate will develop state machines and control system of digital IPs or complex mixed-signal sub-systems comprises of several analog and digital blocks. Experience with mixed signal simulation, verilog modelling and signal path optimization is highly desirable. Analytical approach to problem solving is required. CMOS designs provide challenging learning opportunities where performance, power and reliability are all pushed to the limit while maintaining product execution schedule
- Close collaboration with system architects and product definers to develop RTL that can be scaled for different needs and reused across various product types
- Architect the digital control system of various mixed signal modules focusing on reusability and versatility while maintaining performance edge and product differentiation
- Understanding of mixed-signal design concepts like clock jitter, voltage levels and their impact in a digital system
- Basic understanding of operating principal of analog building blocks like PLLs, power-on-reset modules, clocking circuits etc. and ability to create behavioral model of such IPs
- Define standard interfaces across digital systems or mixed signal systems focusing on future extension and reusability
- The candidate will work on digital design architecture implementation, low power design, synthesis and timing analysis
- Implement Digital On Top (DOT) for SoC design using sub-system IPs and analog IPs.
- The candidate will be able to work as part of a large and focused team of engineers and will be able to collaborate successfully as needed with design architects, digital verification, project management, and digital and analog design teams in multiple worldwide geographies
- Implement micro-architecture to RTL implementation with the refining of features requirements throughout the design process
- Works with validation team for pre-silicon platforms like SOCV, Emulation, FPGA.
- Owns technical outcome of design, verification, implementation, and execution of Power Management ICs with complexities that can span from simple power converters to complex designs, control loops, and digital interfaces
- Understand project goals, execute with realistic schedule, report status of progress and understand clarity of project details and milestones
- Get involved in Customer issues, production issues, FW and System development, Failure Analysis
- Support post-silicon validation activities for your designs.
- Mentor junior engineers
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
More details about our company benefits can be found here:
https://www.onsemi.com/careers/career-benefits
