Find Bridge engineer Jobs in Dublin, D

EDA flow and Logic Synthesis Engineer (Senior Engineer)
Synopsys —Dublin, County Dublin
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COWI —Dublin, County Dublin
- Full-time
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- Engineering
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Principal Engineer, Component Engineering
Analog Devices —Glasnevin, County Dublin
- Full-time
- Doctoral degree
- Master's degree
- Electrical Engineering
ASIC Digital Design, Staff Engineer
Synopsys —Dublin, County Dublin
- Master's degree
- Analysis skills
- Bachelor's degree
9d
Senior Civil Engineer
Amey Ltd —DUBLIN 1, County Dublin
- €55,000–€65,000 a year
- Master's degree
- Bachelor's degree
- Annual leave
Quick apply
Staff Insights Applications Engineer
Analog Devices —Glasnevin, County Dublin
- Full-time
- Computer Science
- Master's degree
- C++
Principal Engineer, Design Verification Engineering
Analog Devices —Dublin, County Dublin
- Full-time
- Master's degree
- Scripting
- Electrical Engineering
- Relocation assistance
Senior IT Security & Network Engineer / Architect 12-Month Contract | Dublin
Hadfield Green —DUBLIN 2, County Dublin
- Communication skills
- Python
Senior Business Value Engineer - EMEA
New Relic —Dublin, County Dublin
- Hybrid work
- Spanish
- Master's degree
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Lead Program Security Engineer
Mastercard —Dublin, County Dublin
- Full-time
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Operational Technology (OT) Security Architect
Accenture —Dublin, County Dublin
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Principal Software Engineer, AWS Lambda
Amazon Development Centre Ireland Limited —Dublin, County Dublin
- Full-time
- Computer Science
- AWS
- C++
Forward Deployed Engineering Manager, Generative AI, Google Cloud
Google —Dublin, County Dublin
- €186,000–€191,000 a year
- Full-time
- Spanish
- Microsoft Excel
- Doctoral degree
3d
Design Engineer – Transportation (Urban/Light Rail Environment)
Roughan & O'Donovan —Dublin, County Dublin
- Full-time
- Microsoft Word
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- Microsoft Excel
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Senior Software Engineer - (Clinical AI) - Ireland
Heidi —Dublin, County Dublin
- Full-time
- Hybrid work
- Master's degree
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Senior Structural Engineer
Ingérop —Dublin, County Dublin
- Full-time
- Hybrid work
- Microsoft Excel
- Contracts
- Employee assistance program
Quick apply
Staff AI Designer
Intercom —Dublin, County Dublin
- Hybrid work
- Annual leave
- Work from home
Forward Deployed Engineer III, GCC (French, German)
Google —Dublin, County Dublin
- €100,000–€103,000 a year
- Full-time
- Spanish
- Microsoft Excel
- Doctoral degree
13d

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EDA flow and Logic Synthesis Engineer (Senior Engineer)

Synopsys -
Dublin, County Dublin

Apply Now

Job details

11 days ago

Qualifications

Master's degree
Bachelor's degree
Computer Engineering
Scripting
AI
Communication skills
Debugging

Full job description

Date posted 06/29/2026

Category Engineering Hire Type Employee Job ID 17918 Remote Eligible No Date Posted 06/29/2026

We Are:

At Synopsys, we drive the innovations that shape how we live and connect. Our technology is central to the Era of Pervasive Intelligence — from self-driving cars to learning machines — and we lead in chip design, verification, and IP integration that power high-performance silicon and software.

Within our HPC Controller IP organization, the mid-end team is the bridge between RTL design and physical implementation. We build the flows, automation, and quality checks that synthesize, verify, package, and release complex soft IP at scale — and we hand physical-design teams inputs that are clean, constrained, and implementation-ready.

You Are:

A motivated mid-end engineer with a solid grasp of ASIC design and verification flows, and genuine enthusiasm for automation, flow robustness, and using AI to raise engineering productivity, debug speed, and quality of results. You partner naturally with RTL designers to understand design intent, turn their outputs into physical-design-ready inputs, and collaborate across verification, DFT, physical design, methodology, and tooling teams. You communicate clearly, take ownership, and let data guide your decisions.

What You’ll Be Doing:

Develop, run, and support mid-end flows spanning synthesis, DFT, static checking (SpyGlass), formal equivalence, power analysis, and related quality gates.
Convert RTL outputs into clean, constrained, implementation-ready inputs for physical design.
AI to accelerate the work (e.g., triaging flow logs, summarizing QoR trends, drafting and refactoring scripts).
Debug flow failures end to end: analyze reports, isolate root cause, and drive issues to closure with design, verification, DFT, and implementation teams.
Improve documentation, handoff criteria, and reusable collateral so execution stays consistent across IP programs.

The Impact You Will Have:

Higher-quality RTL-to-physical-design handoffs and lower implementation risk.
Faster, more scalable execution through stronger automation and AI-enabled analysis.
Synthesis, DFT, static, formal, and power issues caught earlier in the cycle.
Tighter collaboration across the RTL-to-implementation chain.
Robust, implementation-ready soft IP shipped with clear constraints, checks, and release collateral.

What You’ll Need(Core):

Working knowledge of ASIC design, verification, and mid-end development flows, typically gained through 2+ years of relevant experience or equivalent project work.
Hands-on synthesis experience, with the ability to analyze and resolve synthesis issues.
Good Tcl scripting skills and a practical, automation-first mindset.
Familiarity with some of the following: DFT concepts, static checking (SpyGlass or equivalent), formal equivalence (e.g., Formality), or power analysis — and willingness to grow across the rest.
Ability to use AI tools effectively to accelerate debugging, summarize results, and improve scripts and flows.
Good analytical, problem-solving, communication, and documentation skills.
BS/MS in Electrical/Computer Engineering or equivalent experience.

Nice to have :

Some experience across the full mid-end set: DFT, SpyGlass, Formality, and power analysis.
IP development methodologies, IP packaging, or reusable IP delivery / release collateral.
Hands-on with Synopsys tools such as Fusion Compiler and VC SpyGlass.

Who You Are:

Proactive, curious, and adaptable.
Collaborative and ethical.
Flow-oriented, AI-aware, and quality focused.
Resilient and results oriented.

The Team You’ll Be A Part Of:

You’ll work with a high-impact High-Performance-Compute team focused on delivering complex IP to the marketplace. You will collaborate across RTL design, verification, DFT, physical design, methodology, and project infrastructure teams to improve mid-end readiness and enable predictable downstream implementation.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about salary and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Apply Now

Refine Your Search

bridge engineer jobs in dublin, d

EDA flow and Logic Synthesis Engineer (Senior Engineer)

Senior Risk Management Engineer / Scientist

Staff Engineer, Firmware Engineering

Senior Geotechnical Engineer

Principal Engineer, Component Engineering

ASIC Digital Design, Staff Engineer

Senior Civil Engineer

Staff Insights Applications Engineer

Principal Engineer, Design Verification Engineering

Senior IT Security & Network Engineer / Architect 12-Month Contract | Dublin

Senior Business Value Engineer - EMEA

Lead Program Security Engineer

Operational Technology (OT) Security Architect

Principal Software Engineer, AWS Lambda

Forward Deployed Engineering Manager, Generative AI, Google Cloud

Design Engineer – Transportation (Urban/Light Rail Environment)

Senior Software Engineer - (Clinical AI) - Ireland

Senior Structural Engineer

Staff AI Designer

Forward Deployed Engineer III, GCC (French, German)

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Category Engineering Hire Type Employee Job ID 17918 Remote Eligible No Date Posted 06/29/2026

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